The present invention relates to a data coincidence detecting circuit for comparing one data composed of a plurality of bits with the other data composed of a plurality of bits and determining whether the one data coincides with the other data, especially to those employed in a security circuit provided with two pairs of key codes for comparing one key code with the other key code and determining whether one key code coincides with the other key code.
Japanese Patent Laid-Open Publication No. 56-120224 discloses a comparing and detecting circuit for comparing one data composed of a plurality of bits with the other data composed of a plurality of bits and determining whether the former data coincides with the latter data. According to the known circuit, one bit in one data is each time compared with one bit in the other data and the compared result is stored in a latch circuit. Hence, many comparing operations are required to determine whether all the plurality of bits coincide with the other plurality of bits, which involved long processing time.